Figure 3
SEM images of the nanoelectromechanical amplifier after each fabrication step. (a) Initial shape of the device fabricated on an SOI wafer with n-type doped, 0.04-Ωcm resistivity and 2-μm device layer after patterning of the support beams and a single mass using photolithography followed by deep reactive ion etching (DRIE) and HF removal of the buried oxide layer. (b) The center of the initial single mass is etched from the sides using FIB to form the two suspended masses along with a preliminary wide beam in the middle. (c) The final image of the fabricated device after FIB etching continues with a higher precision to form a 100-nm-wide piezoresistive beam and successive dry thermal oxidation and oxide removal in HF to trim the edges and reduce the beam width to 70 nm. (d) Close-up image of the final beam. (e and f) Close-up image of the beam and the final fabricated device, respectively, of a similar beam with larger masses (75 μm×75 μm), which provide gain at lower frequencies.
