Figure 5: Full-adder sum bit. | Nature Communications

Figure 5: Full-adder sum bit.

From: Sub-kBT micro-electromechanical irreversible logic gate

Figure 5

Top: full-adder sum calculation realized with four cantilevers coupled with electrostatic forces. The deflection of one cantilever depends on the inputs and the position of the nearest cantilevers. Bottom: deflection of each cantilever as function of all combination of inputs (first row of the table). The last cantilever encodes the output sum bit of the full-adder.

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