Figure 4: Sacrificial nanofluidic devices after sealing venting holes.

(a,b) Cross-sectional SEM images showing venting holes after PECVD SiO2 sealing, showing: (a) completely sealed venting holes at the top surface; (b) only minimal (∼20 nm) SiO2 deposited at the nanohole bottom. The α-Si layer was intentionally left to visualize the deposited SiO2. (c) Optical image of completed nanofluidic chips on an 8-inch wafer. (d–h) Cross-sectional TEM images showing different nanochannels dimensions: (d,e) 350 nm by 90 nm; (f,g) 52 nm by 33 nm; and (h) 18 nm by 32 nm. The scale bars in figures d and f are 500 and 200 nm, respectively.