Figure 2: Tile and vertex model representation of the ripple-carry adder.
From: Quantum vertex model for reversible classical computing
(a) The ripple-carry adder which computes the carry bit that is ‘rippled’ to the next bit. We add one additional control line sn and set it to 1 to implement the original CNOT gate with a TOFFOLI gate. (b) The ripple-carry adder implemented on the tile lattice, with different gates depicted in different colours: blue tile: ID; green tile: SWAP; gold tile: TOFFOLI. Spins between adjacent tiles are forced to be equal by the ferromagnetic ‘grout’ coupling K. (c) The ripple-carry adder mapped to a vertex model with periodic boundary condition in the transverse direction. After each column of gate (vertex) operation, bit states are labelled at each bond. Light yellow and grey stripes represent the P and T matrices used in the transfer matrix calculation of the partition function.
