Figure 5: Schematic Architectural Design.

Specific impurity implantation within the architecture, which is designed to achieve parallel gate operations. Plaquettes, outlined in green, are chosen with y ∼ 600 nm and x ∼ 550 nm; the individual plaquette-lattice spacing is chosen with h ∼ 6 nm and w ∼ 20 nm. The magnetic field is oriented along the NV axis, which is normal to the shown computational plane (Supplementary Fig. S1) and the gradient is represented by the change in this field strength along the direction. The distance between all nearest-neighbour pairs in the horizontal direction is ∼21 nm () and the spacing between spin D and spin A^′ is given by w/2. We note that the figure is not drawn to scale and that all impurity spins sit on the horizontal lattice, whereas some impurity spins sit at midpoints of the vertical lattice. The particular lattice spacing is chosen to ensure that the spatial separation between individual nitrogen impurities forming the spin chain, as well as between NV registers and nitrogens does not exceed ∼20 nm. The chosen plaquette-lattice spacing implies that neighbouring plaquettes are coupled by ∼25 nitrogen impurities (black spins) in the direction and by ∼30 nitrogen impurities in the direction. The zig–zag pattern of impurity implantation in the direction (w/2 horizontal distance) ensures that all spin chain links are of identical length, thereby allowing for parallel sequential swap operations along . Additionally, such a pattern overcomes the limitation of imperfect NV conversion efficiency (Supplementary Note 2) by allowing each vertical spin chain to span a sufficiently large horizontal spacing. As the impurities forming the horizontal spin chain occupy unique rows relative to the vertical spin chain, during the adiabatic sequential swap, selective spin echoing of the horizontal chain impurities ensures that dipole coupling from such impurities will not induce operational errors. While the architecture is designed to showcase the ability to utilize the adiabatic sequential swap and FFST in differing directions, it is important to note that within the specific blueprint above, either implementation of the DSCB can be used in both directions.