Figure 4: Schematic diagrams of surface electronic structures and comparison of data and simulations for a 120-nm thick Si NM. | Nature Communications

Figure 4: Schematic diagrams of surface electronic structures and comparison of data and simulations for a 120-nm thick Si NM.

From: Probing the electronic structure at semiconductor surfaces using charge transport in nanomembranes

Figure 4

(a,c): band diagrams without and with surface defect electronic structure. In (c) the peak indicates the energy position of the type-C defects. (b,d): corresponding calculations and experimental data. In (b) only surface bands are taken into consideration while in (d) type-C defects are added to the model. Black: data; blue curves: without surface charge mobility; red curves: with surface charge mobility. The π and π* band positions are taken from 20. The type-C defects are described as a Gaussian distribution with a peak position 0.50 eV above EV and a full width at half maximum of 0.078 eV (3kBT at room temperature). The fitting parameters at the back Si/SiO2 interface are Dit=9.5 × 1011 eV−1 cm−2 and Qox=6.7 × 1011 cm−2. The carrier mobility within the π* band is 45 cm2 V−1 s−1.

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