Figure 1: Aspects in battery layout and design.

(a) Schematic illustration of a completed device, in a state of stretching and bending. (b) Exploded view layout of the various layers in the battery structure. (c) Illustration of ‘self-similar’ serpentine geometries used for the interconnects (black: 1st level serpentine; yellow: 2nd level serpentine). (d) Optical images of the Al electrode pads and self-similar interconnects on a Si wafer (left panel; top down view; ~4 unit cells), after transfer printing on a sheet of silicone (middle panel; top down view, in a bent geometry), and with moulded slurries of LiCoO₂ (right panel; top down view, in a bent geometry). (e) Optical images of the Cu electrode pads and self-similar interconnects on a Si wafer (left panel; top down view; ~4 unit cells), after transfer printing on a sheet of silicone (middle panel; top down view, in a bent geometry), and with moulded slurries of Li₄Ti₅O₁₂ (right panel; top down view, in a bent geometry). Scale bars in d and e are 2 mm.