Figure 3: XPS depth profiling.
From: A plasma-treated chalcogenide switch device for stackable scalable 3D nanoscale memory
(a) Profiled as-deposited As-Ge-Te-Si-N device (with reactive N2). (b) Electrical cycling for 1,000 cycles ((0.5 um)2 cell size) and (c) XPS depth profile of the annealed and cycling of as-deposited As-Ge-Te-Si-N device. (d) Electrical cycling for 1,000 cycles ((0.5 um)2 cell size) and (e) XPS depth profile of the annealed N2 plasma-treated As-Ge-Te-Si-N device. (f) SIMS profile showing formation of Si3N4 in the N2 plasma-treated device. Insets in b and d show the change in off-state current by switching cycle.
