Figure 4: Performance of QQT(CN)4 Fe-FET memories after sharp folding.

(a) A photograph of arrays of QQT(CN)4 Fe-FET devices prepared on an Al-coated PI substrate while being sharply folded. Scale bar, 1 cm. A schematic is also shown of a device after folding in a direction of the folding-induced strain perpendicular to the source drain channel. (b) An OM image showing a deformed line arising from the folding event between source and drain electrode. Scale bar, 200 μm. (c) A SEM image of the folded line with inelastic deformation of the substrate. Scale bar, 3 μm. An inset shows a zoomed out folding line. Scale bar, 50 μm. (d) A SEM image of a cross-sectional view of a folded Fe-FET device. Scale bar, 500 nm. (e) Transfer characteristics of a p-type QQT(CN)4 Fe-FET after sharp folding. The drain voltage V_DS is −5 V. (f) ON/OFF current ratio of hysteresis curve measured in a p-type QQT(CN)4 Fe-FET as a function of the number of folding cycles. (g) Data retention characteristics measured in a device after 1,000 folding cycles. The ON and OFF current were measured after programming the device with −60 and +60 V single pulses, respectively. (h) Write/erase endurance cycle test as a function of the number of programming cycles forQQT(CN)4 Fe-FET after 1,000 folding cycles. For clarity, one cycle out of every four is represented. The programming voltage pulses for switching ON and OFF states were −50 and +50 V, respectively. The read voltages for both ON and OFF states were V_G=−10 V and V_DS=−5 V.