Figure 4: FETs based on ultrahigh-density semiconducting nanotube arrays assembled using the fringing-field dielectrophoresis. | Nature Communications

Figure 4: FETs based on ultrahigh-density semiconducting nanotube arrays assembled using the fringing-field dielectrophoresis.

From: Fringing-field dielectrophoretic assembly of ultrahigh-density semiconducting nanotube arrays with a self-limited pitch

Figure 4

(a,b) Schematic (a) and false-coloured SEM image (b) of a nanotube FET that incorporates purely semiconducting carbon nanotube arrays as channel. Device channel width is 1 μm and channel length is 100 nm. Scale bar, 500 nm. (c) Transfer characteristic of this transistor with drain–source current (IDS) plotted in both linear (left axis, black) and logarithmic (right axis, blue) scales. Gate–source bias (VGS) is swept between −8 and 0 V. Applied source–drain bias (VDS) is −0.5 V. (d) Current–voltage characteristic of this transistor with applied VGS changing from −8 to −2 V at a step of 0.25 V from top to bottom.

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