Figure 2: Projected memory devices.

(a) Schematic 3D view of projected phase-change memory devices with lateral geometry. They consist of a TiN projection layer and a phase-change layer of either AIST or GeTe. These layers are surrounded by SiO₂ for electrical and thermal insulation. The device has two electrical connections to the top level. (b) SEM images (top view) of a device with tapered and one with rectangular geometry during fabrication. The device length in both cases is 400 nm, and the width of the rectangular device is 50 nm. Scale bar, 200 nm. (c) The write process simulated by FE modelling. (top) Temperature map of the device (side view). The contour indicates the 900-K isotherm, inside which the phase-change material is assumed to be amorphous after the melt-quench process. Scale bar, 100 nm. (bottom) Current-density map (side view) during write, not drawn to scale. The current density is uniform and highest in the phase-change material. (d) The read process simulated by FE modelling. (top) Temperature map (side view) of the device. The temperature rise due to the read current is negligible (≈1 K). Scale bar, 100 nm. (bottom) Current-density map of the device (side view) during read, not drawn to scale. The current largely circumvents the amorphous region created by the write process of c, and predominantly flows through the projection component.