Fig. 4: Simulation of FONN for image recognition by the artificial photonic synapse.
From: Optical synaptic devices with ultra-low power consumption for neuromorphic computing
a Schematic illustration of the simulated FONN with a three-layer architecture. b Schematic of a neuron node and synaptic weight update process. c Circuit block diagram for the simulation showing the photonic synapse array and the peripheral circuits. MUX, multiplexer; ADC, analog-to-digital converter. d Calculated MNIST recognition rate as a function of training epochs. e The confusion matrix between desired value and predicted value after 1 and 13 training epochs
