Fig. 4: A 3 × 3 PD-RRAM array for in-sensor computing as a classifier. | Light: Science & Applications

Fig. 4: A 3 × 3 PD-RRAM array for in-sensor computing as a classifier.

From: Optoelectronic array of photodiodes integrated with RRAMs for energy-efficient in-sensor computing

Fig. 4

a Schematic illustration of the PD-RRAM array for analog MAC operations. The accumulated output current (Iout) is generated by N pixels that are connected in parallel. b Letter images of 3 × 3 pixels used for training/inference with 2-class. c Accuracy of the classifier during training under different noise levels (σ represents the variance of image noise). d From top to bottom: theoretical dimensionless weights, theoretical RRAM resistance states, actual RRAM resistance states after programming. The unit of resistance is kΩ. e Schematic illustration of the optical setup for recognition. The LED light is spatially modulated by a DMD and resulting images are projected onto the PD-RRAM array. f Measured output of the PD-RRAM array for recognition. Projection of different letters with a duration of 0.5 s, leads to the distinct Iout

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