Fig. 3: CAD rendering of the analog resistance mode test chip. | Microsystems & Nanoengineering

Fig. 3: CAD rendering of the analog resistance mode test chip.

From: Capillaric field effect transistors

Fig. 3

The device was fabricated using micromilling in Polymethylmethacrylate, as reported previously22, and consisted of 36 cFET structures arranged in parallel between two large distribution channels with inlets A to D. The trigger channel volume of each cFET incrementally increases from right to left to create a full range of occluding bubble states. Inset shows a close-up illustrating how the trigger channel volume was incrementally increased by lengthening the trigger channels

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