Fig. 2: Schematic illustration of the INHIBIT gates. | NPG Asia Materials

Fig. 2: Schematic illustration of the INHIBIT gates.

From: A versatile DNA-supramolecule logic platform for multifunctional information processing

Fig. 2

a Diagram of the electronic INHIBIT logic circuit. b The schematic truth table of the binary INHIBIT gate. The fluorescence spectra of MTC with different input conditions (c) and the normalized fluorescence intensity (FI) of MTC monomers as the output (d) in the binary INHIBIT gate. e The schematic truth table of the ternary INHIBIT gate. The fluorescence spectra of MTC with different input conditions (f) and the normalized MTC FI as the output (g) in the ternary INHIBIT gate

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