Fig. 3: Current–voltage (IDS − VDS) characteristics of FET devices with different PMA electrodes. | NPG Asia Materials

Fig. 3: Current–voltage (IDS − VDS) characteristics of FET devices with different PMA electrodes.

From: Approaching barrier-free contacts to monolayer MoS2 employing [Co/Pt] multilayer electrodes

Fig. 3

Bias dependence (VDS) of the source-drain current (IDS) on a semilogarithmic scale as a function of the back gate voltage (Vg) at room temperature for a device A and b device B. The insets show IDS − VDS curves on a linear scale in a small range of VDS. c, d The Arrhenius plots at Vg = 0 V as a function of VDS for devices A and B, respectively. Solid lines are the fit of Eq. (2) in the main text.

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