Fig. 3
Voltage hysteresis loop in b-axis WTe2/Al2O3/Fe tunnel junctions. a schematic of the spin–momentum locking of the topological Fermi arc in WTe2. The Weyl points with opposite chiralities are labeled as + (blue) and − (purple). The green arrow represents the spins. b–d The voltage hysteresis loop as a function of the in-plane magnetic field under a different DC current (T = 2 K). The DC currents in different panels are b: Idc = 10 μA; c: Idc = 50 μA; and d: Idc = −50 μA, respectively. The directions of the magnetic field and current are indicated in the figures. The high- and low-resistance states are also illustrated by the relative orientation of the accumulated spin magnetic moment and moment of the ferromagnetic layer. e The voltage difference between the high- and low-resistance states as a function of the DC current. f The temperature dependence of the voltage difference between high- and low-resistance states (Idc = 50 μA). The error bars in e and f represent the noise of the field dependence of the voltage hysteresis loop. The thickness of the WTe2 in Device 2 is 23.0 nm. The error bars in e and f come from the noise in measured voltage
