Fig. 2
From: Additively manufacturable micro-mechanical logic gates
Design of mechanical logic gates. a Undeformed shape of the NOT gate. b A conceptual design of a mechanical inverter using flexible beams. c Geometry configurations of the NOT gate at the two stable states representing the negation of logic 0 and logic 1, respectively. d Geometry configurations of the OR gate at Mode I (0 OR 0), Modes II & III (0 OR 1 and 1 OR 0), and Mode IV (1 OR 1). e Geometry configurations of the NAND gate at Mode I, Modes II & III, and Mode IV. f Quasi-static timing diagram of the outputs of NOT, OR, and NAND when the inputs (A, B) transition from (0, 0) to (1, 0) to (1, 1)
