Fig. 5: Two-bit states of SRMC.
From: Self-rectifying resistive memory in passive crossbar arrays
Two-bit states programmed using a erase-and-program scheme and b erase-free scheme on five SRMCs (indexed #1–#5). c Cumulative distribution of amplitudes of two-bit programming pulses. Average amplitude and standard deviation denoted by m and σ. d SOP between two-bit states. e Retention of two-bit states at 85 °C.
