Table 2 Voltage across cells over a CA for Schemes 1–4.

From: Self-rectifying resistive memory in passive crossbar arrays

 

Scheme 1

Scheme 2

Scheme 3

Scheme 4

Biasing line voltage

Vop

Vop

Vop

Vop

Row-inhibit-line voltage

1/2Vop

2/3Vop

1/3Vop

1/3Vop

Column-inhibit-line voltage

1/2Vop

1/3Vop

2/3Vop

1/3Vop

Voltage across a selected cell

Vop

Vop

Vop

Vop

Voltage across an unselected group 1 cell

1/2Vop

1/3Vop

2/3Vop

2/3Vop

1/3Vop

Voltage across an unselected group 2 cell

0

−1/3Vop

1/3Vop

0