Fig. 4: Operational stability of perovskite TFTs and performance of the integrated inverters.
From: High-performance hysteresis-free perovskite transistors through anion engineering
a On/off switching sweep of the I-pristine and I/Br/Cl TFTs. b VTH variation under bias (VGS = VDS = −12 V). c Optical image and diagram of an integrated perovskite/IGZO inverter. d Voltage transfer characteristics and e gain ((dVOUT)/(dVIN)).
