Fig. 3: Role of RRAM devices in neuromorphic circuits.

a Scanning Electron Microscopy (SEM) image of a HfO₂ 1T1R RRAM device, in blue, integrated on 130 nm CMOS technology, with its selector transistor (width of 650 nm) in green. b Basic building block of the proposed neuromorphic circuit. Inputs voltage pulses (spikes), V_in0 and V_in1, draw a current I_weight proportional to the conductance states, G₀ and G₁, of the 1T1R structures. This current is injected into a DPI synapse that excites a LIF neuron. The RRAMs G₀ and G₁ are set in the HCS and LCS, respectively. c Cumulative density function of the conductance of a population of 16 kb RRAM devices, as a function of the compliance current I_CC, which effectively controls the conductance level. d Measurement of the circuit in (a), showing that G₁ (in LCS) effectively blocks inputs from V_in1 (green), in fact the output neuron's membrane voltage only responds to the blue input of V_in0. RRAMs efficiently define the connections in the circuit. e Measurement of the circuit in (b) showing the effect of the conductance value G₀ on the membrane voltage V_mem, following the application of a voltage pulse V_in0. The larger the conductance, the stronger the response: the RRAM device thus implements the weight of the input-to-output connection. Measurements have been performed on one circuit and demonstrate the dual function of the RRAMs, they route and weigh the input pulses.