Fig. 2: Low-voltage readout of single 180°-DW devices using sub-micron electrodes.

PFM-amplitude (left column), PFM-phase (center) and cAFM (rigth) scans show the capacitor device (outlined by dotted line) connected with a single 180°-DW (on-state) and uniformly poled without a connected domain wall (off-state). cAFM maps were taken with a sample bias of 2 V. a–d On-state of the device. The 180°-DW is pushed inside the capacitor area ensuring a stable conduction path between the top and bottom electrode. Consecutive I–V curves are performed in d by placing the AFM-tip onto the electrode. Stable and low-noise current readouts of 40–50 nA were achieved for <2 V. e–h Off-state of the device. After applying to the top electrode a positive voltage pulse exceeding the coercive field value, the 180°-DW is pushed away from the device, breaking the conduction path and inducing the high-resistance state. In h consecutive I–V scans are performed through the electrode showing low sub-20 pA currents. i–l Off-state of the device. By using a voltage pulse of opposite polarity (negative), the poled region can be extended to fully cover the electrode area (with no domain wall touching the electrode). This results in similar I–V characteristics l as shown in h with only tens of pA currents. m Consecutive pulse train measurements performed on an on-state device. Each pulse train consists of 10 triangular voltage pulses of 2 V/200 ms. n Comparison between different readout methods. Yellow dotted line indicates a pulse readout by placing the tip on a 180°-DW. The red dotted line shows the same readout scheme with the tip sitting on the electrode. Blue solid line indicates a readout through the electrode but with a constant 2 V DC readout. The black line in m and n indicates the off-state conductance level of 30 pA.