Fig. 2: Phase diagram of CrOCl-interfaced BLG in the space of ntot and Deff. | Nature Communications

Fig. 2: Phase diagram of CrOCl-interfaced BLG in the space of ntot and Deff.

From: Unconventional correlated insulator in CrOCl-interfaced Bernal bilayer graphene

Fig. 2

a \({\sigma }_{{{{{{{{\rm{xx}}}}}}}}}={R}_{{{{{{{{\rm{xx}}}}}}}}}/({R}_{{{{{{{{\rm{xx}}}}}}}}}^{2}+{R}_{{{{{{{{\rm{xy}}}}}}}}}^{2})\) of Device-S8 plotted in the ntot-Deff space, measured at B = 12 T and T = 1.5 K. Here Rxx and Rxy are longitudinal and transverse resistance, respectively. b Line profile of Hall conductance σxy at ntot = 0.2 × 1013 cm−2 along the dashed line in a, in the range of -0.55 V/nm < Deff < 1.12 V/nm. Here, the effective displacement field is defined as Deff = (CtgVtg − CbgVbg)/2ϵ0 − D0, where Ctg and Cbg are the top and bottom gate capacitances per area, Vtg and Vbg are the top and bottom gate voltage, and D0 is the residual displacement field, respectively. Shaded area denotes the region of the charge neutrality. c Schematic image showing the interfacial states near the interface between CrOCl and BLG, with an average distance between these states and BLG defined as d (more details in Methods and Supplementary Note 1). d Simplified electrostatic model with three capacitors with each of their parameters indicated. Here, di (i = 1, 2, 3), εi (i = 1, 2, 3), and Ei (i = 1, 2, 3), are the distance, dielectric constant, and electrical field of the top (between the top gate and graphene), middle (between graphene and the surface state of CrOCl), and bottom (between bottom gate and the surface state of CrOCl) capacitor, respectively. nt, n2, and nb, denote the carrier concentration induced in the top gate, surface state in CrOCl, and the bottom gate, respectively. Ids and Vds denote the source-drain current and voltage, respectively. e Calculated carrier density nBLG in BLG (step size between each iso-doping line is 2 × 1012 cm−2) at B = 0, using the model described in Supplementary Note 1. f Calculated displacement field DBLG in BLG, with each iso-DBLG line stepped by 0.3 V/nm. Phase-boundary of the two distinct phases (i.e., conventional Phase-i, and interfacial coupling Phase-ii) is indicated by the black dashed line. Shaded areas in e, f denote the charge neutrality of the system. g Ids as a function of 1/T in a semi-log plot. Thermal activation gaps extracted from each curve are labeled, with the solid line being fitted linear slopes.

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