Fig. 4: The fabrication process of the dual-layer encryption fluorescent optical waveguide chip. | Nature Communications

Fig. 4: The fabrication process of the dual-layer encryption fluorescent optical waveguide chip.

From: Dual-layer optical encryption fluorescent polymer waveguide chip based on optical pulse-code modulation technique

Fig. 4

a Cleaning the silicon substrate; b spin-coating the lower cladding layer; c spin-coating of TCBzC/SU-8 core layer; d exposure of the bottom waveguide layer device; e wet-etching for the waveguide; f spin-coating the buffer layer; g spin-coating of TCNzC/SU-8 top layer; h exposure of the top waveguide layer device; i wet-etching for the waveguide; j spin-coating the upper cladding layer.

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