Fig. 2: Experimental demonstration of HyArch PIC optoelectronic computing system. | Nature Communications

Fig. 2: Experimental demonstration of HyArch PIC optoelectronic computing system.

From: High-efficiency reinforcement learning with hybrid architecture photonic integrated circuit

Fig. 2

a Top-level diagram of the optoelectronic computing system with integrated PIC and FPGA on a development board. The computer, laser, and power supply are housed in a standard server rack. b Photograph of the optoelectronic computing board. c Microscope image of the HyArch PIC, featuring a grating coupler (GC)-based I/O port array. Three input ports connect to the unitary MZI mesh module, and three output ports export light from the OCTOPUS modules. d Unit calibration curve of a single push-pull MZI unit with sine-like fitting. e Measurement results for arbitrarily configurable U(3) module. f Rising and falling edge of the thermal optical modulator. g Power distribution at vertices of 3D spherical coordinate axes, with error bars representing the standard deviations within each group of vertices.

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