Fig. 10: Analogue CMOS implementation of the Winner-Takes-All (WTA) function.
From: Hardware implementation of memristor-based artificial neural networks
a WTA CMOS block with voltage input291. The gate terminal of transistor Q5, and the source terminals of transistors Q6 and Q7 are common to all WTA cells. b WTA CMOS block with current input148. Node Vcom is common to all WTA cells. In both cases, the output voltage of the WTA cell with the highest input voltage/current is driven to the positive reference voltage (VDD), while the output voltage of the remaining WTA cells is driven to ground. The number of cells in the WTA module is the same to the number of classes of images to identify by the ANN.
