Fig. 1: Design of Gaussian-like memory transistor. | Nature Communications

Fig. 1: Design of Gaussian-like memory transistor.

From: Highly parallel and ultra-low-power probabilistic reasoning with programmable gaussian-like memory transistors

Fig. 1

a Resurrection of three Bayesian filtering approaches for various probabilistic inference tasks. b Schematic representation of Bayesian filtering approach that comprises of an input and state and measurement. c Schematic representation of probabilistic inference that comprises a probability distribution function layer for Gaussian mixture model (GMM) calculation input stimulus to the output value. d A schematic concept of the probabilistic reasoning using a Gaussian-like output transistor compared to the multiply and accumulation (MAC) operation. e a schematic illustration of a Gaussian-like memory transistor (GMT) device structure. f, g The schematic illustrations of the p- (purple) and n-type (red) transfer curve (absolute value of drain current ( | ID | ) versus gate voltage (VG)) shift along with the memory programming (f) and corresponding transfer characteristic (purple) of the GMT device (g).

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