Fig. 5: Symmetric cell performances of untreated Li0 and TEMED-treated Li0.

a, b Galvanostatic cycling and voltage hysteresis at 0.5 mA cm−2/1 mAh cm−2. (insets show (i) short circuit for untreated Li0, (ii) plating/stripping behavior of TEMED-treated Li0 at 1600–1640 h). c, d Galvanostatic cycling and voltage hysteresis at 1 mA cm−2/1 mAh cm−2. (insets show (i) short circuit for untreated Li0, (ii) plating/stripping behavior of TEMED-treated Li0 at 420–440 h). Schematic illustration of e Li0 dendrite growth on untreated Li0 and f uniform deposition on TEMED-treated artificial SEI. SEM images of g–i untreated Li0, j–l TEMED-treated Li0 at 5th, 20th, and 100th plating, respectively. The thickness of lithium chip is 450 μm. The scale bars are at 20 µm.