Fig. 4: Memristor-based noise-aided Hopfield network.

a Illustration of a max-cut NP-hard problem. b Energy landscape of a Hopfield network with and without noise. c Schematic of the memristor crossbar within the chip. d The chip used for the Hopfield network demonstration. e Experimental conductance-weight matrix for a problem of size N = 60, and f the corresponding conductance distribution. The conductance matrix represents the max-cut problem being solved. The relationship between the problem’s graph and the conductance matrix is provided elsewhere³¹. g Normalized experimental error in the conductance matrix relative to the target (experimentally programmed conductance matrix minus the target conductance matrix). h Energy descent of 100 cycles for TRNG-based Hopfield network in calculations with no noise, hardware-realistic simulations (with hardware-matched noise), and experimental hardware results. Clearly, the case with no noise settles into a high-energy incorrect solution quickly and stays there, whereas the cases with realistic noise settle into a lower energy (optimal) solution. i Success probabilities of TRNG-based Hopfield network for 100 and 300 cycles at different node sizes. j Success probability of TRNG-based network minus that of PRNG-based network at different node sizes. Data points above zero on the vertical axis indicate superior performance compared to PRNGs.