Fig. 2: Hardware structures for EGC.

a A self-assembled metal nanowire network. Metal wires coated with ion-conductive materials are crossed, exhibiting memristive properties. Random graph dynamics arise from conductive pathways determined by the random arrangement of metal wires. b A spatiotemporal thermal conduction network based on Mott memristors. Connections between nodes are formed through thermal diffusion. c The dynamic and stochastic characteristics of memristors form a virtual circulatory network driven by applied voltage. d A CBA with a shortened diagonal. Using a self-rectifying memristor as an individual element in the array enables the physical mapping of the graph’s adjacency matrix. The right panel illustrates the represented graph and the electrical characteristics of the devices. Current flows bidirectionally through the shorted device (orange line), while it flows unidirectionally through the self-rectifying device (black line). e A CBA with a cross-wired diagonal. Similar to m-CBA, self-rectifying memristors are used as individual elements in the array. The right panel illustrates the represented graph and the electrical characteristics of the diagonal devices (orange line) and off-diagonal devices (black line). The cross-wiring configuration enables rectification along the diagonal direction, allowing for more accurate graph representation. f A module utilizing probabilistic switching devices in the diagonal shorted CBA. The right panel illustrates the probabilistic graph and the electrical characteristics of probabilistic switching devices. g, h A schematic for applying voltage to extract connectivity from the graph mapped onto the crossbar. A 9 × 9 graph can be directly mapped onto a 9 × 9 diagonal shorted CBA. The connectivity between the two nodes is determined by applying voltage and grounding to the word line and bit line of the crossbar.