Fig. 5
From: Large-area plastic nanogap electronics enabled by adhesion lithography
Non-volatile memory nanogap devices developed using a-Lith. a Schematic of the memory device architecture fabricated via a-Lith. b I–V characteristics measured for nanogap devices based on ZnO, F8BT, and PFO:CNT. c Bias waveform used to programme the device resistance state and for subsequent endurance evaluation: The reset voltage (12 V pulse) applied for ≈100 ms puts the device into the HRS, after which the current is measured between 0 and 2 V. The set voltage (5–3 V sweep) puts the device into the LRS, after which current is again measured in the range between 0 and 2 V. d I–V curves depicting the low-resistance state (LRS) and high-resistance state (HRS) of the three device types tested using the waveform shown in c to switch between states and measure. e Bias waveform used to perform the multilevel programming of the device resistance state. f Multilevel switching characteristics measured from a representative PFO:CNT-based nanogap device. Endurance characteristics of g ZnO, h F8BT, i PFO:CNT nanogap devices obtained over 100 switching cycles. Resistance ratios in all cases are above 103–104
