Fig. 3: Efficiency of Hamiltonian simulation framework.

Estimates of the quantum simulation’s coherence time T_sc, in the target Hamiltonian’s units ∣∣H_T∣∣_local for various models. We consider Hamiltonian simulation implemented using the dual driving gates from Fig. 2b and assume a depolarizing error probability proportional to the gate time, such that ΩT/2π = 1 incurs an error of 0.1%, which is projected to be achievable with neutral atoms^51,87,88. Analogous estimates can be performed straightforwardly for different hardware-dependent error rates using equation (32), which rescales T_sc but does not change the trend. In all cases, we compare against an implementation using two-qubit CPhase gates with fidelity 99.9% and perfect single-qubit rotations (see Methods for detailed descriptions of the heuristic estimation procedure). a, The first two two models are (i) the spin-1/2 Kagome Heisenberg model and (ii) two interacting spin-5/2's with Heisenberg and Dzyaloshinskii–Moriya (DM) terms, both of which are composed of only two-qubit interactions. In (i), a speed-up is achieved by utilizing three-qubit multi-qubit gates \({e}^{-i\tau {{\hat{\bf{S}}}}^{2}}\), which more efficiently generates Heisenberg interactions and reduces the period of the Floquet cycle from K = 4 to K = 2. In (ii), improvement is achieved using dynamical projection, which reduces K from 2S to 2 but at the cost of additional multi-qubit gates. b, Two complex spin models which include spin interactions up to (iii) bi-quadratic interactions \({J}_{1}({{\hat{\bf{S}}}}_{i}\cdot {{\hat{\bf{S}}}}_{j})+{J}_{2}{({{\hat{\bf{S}}}}_{i}\cdot {{\hat{\bf{S}}}}_{j})}^{2}\) and (iv) bi-quartic interactions \({({{\hat{\bf{S}}}}_{i}\cdot {{\hat{\bf{S}}}}_{j})}^{4}\). These correspond to four-body and eight-body qubit interactions, respectively. In (iii), the dramatic speed-up originates from using dynamical projection to reduce the Floquet period, as well as the hardware efficiency of a native four-qubit gate. The individual contribution to the speed-up from both sources is also analysed in Methods. In (iv), the speed-up arises fully from the hardware efficiency of native eight-qubit operations.