Fig. 6: Potential layer-by-layer vdW assembly of a 3D electronic system.
From: Van der Waals integration before and beyond two-dimensional materials
a, Schematics of the essential building blocks for vdW device integration and the essential device layers for vdW system integration. b, Schematic illustration of circuit-level (CMOS circuit) vdW integration by assembling various building blocks, including channel material (L1), electrodes and dielectrics (L2) and interconnects (L3) on a target semiconductor layer. c, Schematic illustration of high-order system-level integration by vdW-stacking multiple active functional layers with low-temperature planarization layers (passive layers; translucent in the schematic) in between.
