Extended Data Fig. 6: Overheads of the Tianjic chip during the bicycle experiment.
From: Towards artificial general intelligence with hybrid Tianjic chip architecture
a, Placement of FCores in different network models. Numbers refer to the number of FCores used. b, Measured power consumption under different tasks and at different voltages. The Tianjic chip typically worked at 0.9 V during the bicycle demonstration, and the power consumption was about 400 mW.
