Extended Data Fig. 5: Realization of various logic gates.
From: Light-field control of real and virtual charge carriers
a, Simulated CEP-dependent current as a function of φA and φB with equal current amplitudes JA, JB induced by laser pulses A (bulk graphene) and B (interface). The purple crosses mark phases φA, φB considered in (b). b, CEP-dependent current for 16 combinations of φA and φB as needed for the operation of logic gates. Positive current is assigned to an output logic level Y of 1 while zero or negative current is assigned to 0 (see colour bar). The green dots mark the combinations required for the formation of the logic gates shown below. c–f, Truth tables of AND (c), OR (d), NAND (e) and NOR (f) are obtained by appropriate choice of CEPs φA and φB as marked in (b). The green arrows (rings) on the insets depicting the heterostructure mark the current direction (zero current) driven on the graphene and at the interface.
