Figure 8 | Scientific Reports

Figure 8

From: Reversibility and energy dissipation in adiabatic superconductor logic

Figure 8

Back-actions in the 1-bit-erasure gate. (a) a = 1, b = 1, c = 1. While the gate B is being excited, the potential energy is tilted toward logic 1 due to the input b. Likewise, the potential energy of the gate B is tilted toward logic 1 by the back-action from the gate Y while being reset. (b) a = 1, b = 0, c = 1. While the gate B is being excited, the potential energy is tilted toward logic 0 due to the input b. On the other hand, the potential energy of the gate B is tilted toward logic 1 by the back-action from the gate Y while being reset, which induces a non-adiabatic state change from logic 0 to 1 before the shape of the potential energy returns to a single well.

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