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Figure 1

From: Broadband tunable integrated CMOS pulser with 80-ps minimum pulse width for gain-switched semiconductor lasers

Figure 1

Schematic design and images of the electric pulser. (a) Image of the lab-made electric pulser on a printed circuit board (PCB). (b) Image of the CMOS pulse generator taken before packaging on the PCB. (c) Enlarged image of the CMOS pulse generator. (d) Design layout of the CMOS pulse generator. (e) Schematic design of the CMOS circuit. TA: Tuning A, TB: Tuning B, DI: Data Input, VDD: Voltage Drain Drain, VSS: Voltage Source Source, GND: Ground.

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