Figure 3
From: Scalable excitatory synaptic circuit design using floating gate based leaky integrators
STDP behavior in a timing-difference domain. The change in synaptic weight (ΔV w) was evaluated with a single pair of pre and postsynaptic spikes (different Δt). The circles indicate the simulation data, which are fitted to the simplified mathematical formula in (1) (solid red lines). The fitting results in τ + and τ − of 16.8 and 76.5 ms, respectively. The reference (initial) synaptic weight (V w0) was 151 mV that results from a V ctrl of 0.51 V.
