Figure 9
From: Scalable excitatory synaptic circuit design using floating gate based leaky integrators
(a) Time-dependent change in V m that was initially set to different values. (b) Retention time τ ret for different initial V m values. The retention time was defined as the time period during which |V m| decreases by 10%. The storage element in Fig. 1 was re-sketched in the inset.
