Table 2 Parameters used for circuit simulations.
From: Scalable excitatory synaptic circuit design using floating gate based leaky integrators
Spike amplitude (V) | Spike width (μs) | C 1 (fF) | C 2 (fF) | C 3 (fF) | V d1 (V) | V d2 (V) |
|---|---|---|---|---|---|---|
0.5 | 30 | 25 | 30 | 1.5 | 0.70 | 0.65 |
V p1 (V) | V p2 (V) | V ctrl (V) | V dd+ (V) | V dd− (V) | Temperature | |
−0.26 | −0.80 | 0.51 | 0.5 | −0.5 | 27 °C | |
