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Figure 1

From: A study on mechanism of resistance distribution characteristics of oxide-based resistive memory

Figure 1

(a) Transmission electron microscopy image of fabricated Pt/Ta2O5−x/TaO2−x/Pt OxRAM with 50 ALD cycles for deposition of resistance switching layer of which resulting thickness is about 3 nm. (b) Experimental measurements of I–V curves for several atomic layer deposition number of cycles (40, 50, and 60) during deposition of resistance switching layer. The resulting switching layer thicknesses are about 2.5, 3, and 3.5 nm respectively. The switching voltages are applied with slow speed of sweep (5 s of period) from −2 V to 2.5 V.

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