Table 4 Program scheme for realizing Boolean operations using a SLIM bitcell.
From: SLIM: Simultaneous Logic-in-Memory Computing Exploiting Bilayer Analog OxRAM Devices
Logica | V1 | V2 | VG1 | VG2 |
|---|---|---|---|---|
\(\overline{{\bf{a}}}\) | gnd | P3 | a | a |
\(\overline{{\bf{b}}}\) | gnd | P3 | b | b |
a + b | gnd | \(\overline{{\bf{b}}}\) | \(\overline{{\bf{a}}}\) | \(\overline{{\bf{a}}}\) |
\(\overline{a+b}\) | gnd | P3 | a | b |
a.b | gnd | P3 | \(\overline{a}\) | \(\overline{b}\) |
\(\overline{{\bf{a}}.\,{\bf{b}}}\) | gnd | b | a | a |
