Fig. 1


(a) Layout of the reference on-chip antenna containing an array of 11 × 11 circular patches without metasurface, top-view, (b) layout of the proposed on-chip antenna designed by an array of 11 × 11 circular patches with metasurface, top-view, (c) back-side of the both reference and proposed on-chip antenna structures. The GSG port is connected to the central via-hole and all metallic via-holes are electromagnetically connected to each other by the GND plane slit. (d) 3D isometric-view of the proposed on-chip antenna structure based on the metasurface concept, (MTS represents the metasurface), (e) equivalent circuit model of the proposed on-chip antenna, and (f) schematic view of the proposed structure.