Figure 1 | Scientific Reports

Figure 1

From: Author Correction: Realization of tunable artificial synapse and memory based on amorphous oxide semiconductor transistor

Figure 1

(a) The schematic of the 3D structure of the device with bottom gate, source, drain, and semiconductor channel, respectively. The conductive electrodes made of Ni/Au were used. The connection line between the drain and source is the semiconductor channel. (b) A representative image form the fabricated device with the bright white metal electrode as long as 800 μm. (c) EPSC triggered by presynaptic spike on bottom gate BG. (d) EPSC decay behavior with a fitting by stretched exponential function.

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