Figure 1
From: NAND and NOR logic-in-memory comprising silicon nanowire feedback field-effect transistors
Structure of SiNW p- and n-FBFETs and diagrams of LIM. (a,b) Schematic view of single-gated SiNW (a) p- and (b) n-FBFETs. (c,d) Diagrams and truth tables of (c) NAND and (d) NOR LIM circuits consisting of p- and n-FBFETs.
