Figure 5
From: NAND and NOR logic-in-memory comprising silicon nanowire feedback field-effect transistors
VTCs for the NAND and NOR LIM. (a) Dynamic VTCs of the NAND LIM sweeping VIN1 with different pulse values of VIN2. (b) Dynamic VTCs of the NOR LIM sweeping VIN1 with different pulse values of VIN2.
