Figure 3
From: Error rate reduction of single-qubit gates via noise-aware decomposition into native gates
Scaling of fidelity with number of operations: the fidelity (vertical axis) representing the overlap between the state output by the noisy application of each circuit (unoptimized and optimized) and the target state output by the noiseless application of the unoptimized circuit is plotted against the circuit depth (horizontal axis) at which the fidelity was measured. Each data point is the average fidelity of 10 randomized gate sequences with 8,192 shots per measurement. Measurements were taken at circuit depths increasing by 7, \(d \in \{1, 8, 15, ..., 246\}\).
