Figure 7
From: Error rate reduction of single-qubit gates via noise-aware decomposition into native gates
Fidelity vs. Coherence Time Drift Factor (System \(T_{1,2}\)/Assumed \(T_{1,2}\)): the fidelity (vertical axis) representing the overlap between the state output by the noisy application of the optimized circuit and the target state output by the noiseless application of the unoptimized circuit is plotted against the factor (horizontal axis) by which the system \(T_{1,2}\) times differ from their assumed values during optimization. Horizontal dashed lines represent represent unoptimized fidelities. Each data point is the average fidelity of 10 randomized gate sequences with 16,384 shots per measurement. Measurements were taken at circuit depths increasing by 100, \(d \in \{100, 200, 300\}\).
