Table 6 Truth table of proposed gates.
From: Efficient design and analysis of secure CMOS logic through logic encryption
Key | Inputs | Outputs | ||||||
|---|---|---|---|---|---|---|---|---|
K | A | B | AND | OR | XOR | NAND | NOR | XNOR |
0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 |
0 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 |
0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 | 0 |
0 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 |
1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 |
1 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 |
1 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 |
1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 |
